Main achievement of ASSERT :
A process to develop software dominant real-time systems.
This process is covering all the phases from early system definition down to final code while preserving properties.
It has been defined and implemented by integrating tools coming from the technology clusters.
It has been exercised and assessed by industrial case studies showing its flexibility and scalability.
It will be the basis for dissemination to industrial projects.
It will be extended by a tighter integration of existing technologies and development of new ones in the follow-up actions after ASSERT.
A detailed view on the rich portfolio of ASSERT results :
The ASSERT processThe definition of a process (the “ASSERT Process”) which aims to enhance the system & software engineering activities by means of model-driven and property-preserving methods and automation tools
Implementations of the process
Two implementations of the ASSERT Process illustrating a combination of multiple technologies supporting transformations from early design models down to the final code while preserving key properties.
- One AADL-based implementation developed by ENST, TNI-Europe and SEMANTIX
- One implementation based on UML2 technologies, where system properties are captured in an RCM metamodel reference framework (UPD, INTECS and SEMANTIX)
Both implementations rely on the ASSERT Virtual Machine, an execution platform designed to preserve and enforce the system properties stipulated at model level (ENST, SciSys, UPM and UPD).
Complementary technologies have been developed and exercised in industrial settings :
- The ALTARICA language to model and verify safety properties (ONERA with industrial teams from DASSAULT AVIATION and ASTRIUM)
- The OMEGA language and the use of the IF format to model and verify system behavior, (VERIMAG and CS with industrial teams from ASTRIUM)
- Integration of UML extensions through the ASSERT AADL (3ADL)/UML profile to facilitate the capture of model attributes using the concepts of AADL,UML, OMEGA and RCM (CS,TNI-SW,VERIMAG)
- The Framework Profile, a UML2 profile for the design of reusable and adaptable software building blocks (ETH)
- XFeature, a tool for the modelling of variability within system families (ETH)
- Model transformation technologies (CS, TNI-SW, INTECS,VERIMAG, ONERA) which allow backward and forward transfer between domain-specific models and models geared to verification (RCM, IF, AADL)
- Synchronous verification of asynchronous models (VERIMAG, ESTEREL-TECHNOLOGIES)
- Tool support and integration in IDEA, the ASSERT IDE based on the TOPCASED and ECLIPSE platforms (CS, TNI-SW, ETH, INTECS, UPD, VERIMAG)
- The infrastructure includes a Software Bus for the plug-in of ASSERT tools (BSSE)
- An engine for the verification of code generators (BSSE).
Complete implementations of industrially-representative case studies :
- The THALES ALENIA SPACE “HRI” prototype which, using a complete case study already shown in successive increments at various occasions, demonstrates how the ASSERT Technologies can serve real-world applications
- The ASTRIUM “MPC” case study, which explored advanced and innovative system-design concepts such as distributed control of a complete constellation, to gage the extent to which the ASSERT technologies can help develop new-generation systems.
